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PE4140
Product Specification
Figure 3. Pin Configuration (Top View)
Electrostatic Discharge (ESD) Precautions
This MOSFET device has minimally protected
inputs and is highly susceptible to ESD damage.
IF1
1
6
IF2
When handling this UltraCMOS? device,
observe the same precautions that you would use
RF1
RF2
2
3
Exposed
Solder Pad
(bottom side)
5
4
LO1
LO2
with other ESD-sensitive devices.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS?
devices are immune to latch-up.
Device Description
Table 2. Pin Descriptions
The PE4140 passive broadband Quad MOSFET
array is designed for use in up-conversion and
Pin
No.
1
2
3
4
5
6
Pin
Name
IF1
RF1
RF2
LO2
LO1
IF2
Description
IF Output Connection (Drain)
RF Input Connection (Source)
RF Input Connection (Source)
LO Input Connection (Gate)
LO Input Connection (Gate)
IF Output Connection (Drain)
down-conversion applications for high
performance systems such as cellular
infrastructure equipment and STB/CATV systems.
The PE4140 is an ideal mixer core for a wide
range of mixer products, including module level
solutions that incorporate baluns or other single-
ended matching structures enabling three-port
operation.
The performance level of this passive mixer is
made possible by the very high linearity afforded
Table 3. Absolute Maximum Ratings
by Peregrine’s UltraCMOS? process.
Symbol
T ST
T OP
Parameters/
Conditions
Storage temperature
range
Operating temperature
range
Min
-65
-40
Max
150
85
Units
°C
°C
Marking
Packaged devices are marked with part number
“4140”, date code and lot code.
Moisture Sensitivity Level
Maximum DC plus peak
The Moisture Sensitivity Level rating for the
V DC + AC
AC voltage across Drain-
Source
±3.3
V
PE4140 in the 6-lead 3x3 DFN package is MSL1.
Maximum DC plus peak
V DC+AC
AC voltage across Gate-
±4.2
V
Drain or Gate-Source
V ESD
HBM 1 ESD Voltage
100
V
Note 1: ML_STD 883 Method 3015.7
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be
restricted to the limits in the Operating Ranges
table. Operation between operating range
maximum and absolute maximum for extended
periods may reduce reliability.
?2005-2009 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0089-09 │ UltraCMOS? RFIC Solutions
Page 2 of 10
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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